  ## The Unary Number System

I apologize to mathematicians for the introduction of a new number symbol into number theory without a fully worked proof in this naive approach to number theory. This number is a complex number with a real and imaginary value.

The basis of this approach to Register/Gate Quantum Computing is the realization that QC is based on a number system with only one value called a superposition state compared to the next radix in a multi radix number system the binary state of traditional computing which has only two values 1 and 0.

If we choose the Greek symbol capital Phi simply because it looks like a superimposed 1 and 0 it to represent the qubit it will make simple equations easier to understand.

The unary number system set therefore has two values {NULL, } in the real and imaginary number line.

The binary number system set therefore has three values {NULL, 1,0 } in the real number line and {NULL, 0,1} in the imaginary number line.

The NULL operator sets the register size. Imagine a modified dozen egg carton to represent a six qubit register with barriers to prevent a cotton ball only being able to move between the top and bottom receptacles. Six cotton balls are loaded along the egg carton and the lid is closed and the register (egg carton) placed in the quantum state by shaking.

When the register is taken out the quantum state by being held stationary, the lid is then opened and the binary state is read.

The six cotton balls will be in a random state distributed between the Q top row and the Not Q bottom egg well. The terms Q and Not Q are borrowed from the language of logic gates called flip flops which form the basis of traditional digital electronic computing.

If only five cotton balls are added to the register then one of the dual egg wells is considered to be in the NULL state. To make sense of the binary output we must decide which bit (dual egg well) is considered the Least Significant Bit and the NULL is added after the Most Significant Bit. The register is now a five qubit register.

This allows the register to be sized to the appropriate number of permutations for the estimated result of the quantum algorithm designed to solve a specific quantum calculation. The image above shows how the complex plane of a clocked JK Flip Flop simulates a Qubit. One of the qualities that a Quantum Computer is expected to exhibit is called "Reversible Computing" where the energy of the computation is not wasted to heat as occurs in traditional computing. In reversible computing a register has to be twice the size of a traditional register. A 32 qubit number when read must be held in two 32 bit register's to account for the Not Q output which is used to error check the quantum calculation. The Q and Not Q register are checked by use of the XOR gate a correct calculation will result in a True or 1 output and an incorrect calculation will result in False or 0.

## Squeezed Coherent State

In the Qbitrex system real data is entered electronically in a binary format the imaginary number is calculated from the real number bits by use of a NOT gate and the two binary outputs are combined into adjacent bits within a Hilbert Curve array that trigger LEDs converting an electrical signal into a light signal for the quantum calculation that takes place within a light circuit. The result is converted back to an electronic signal via LED's configured as detectors by forward biasing them to the gate of an N-Channel Enhancement Mode FET, in a proprietary circuit.

The result of the quantum calculation results in something called a "Squeezed Coherent State" within a Quantum Beam Splitter light circuit. The electronic part of the process is controlled by FPGA's one for each register. The algorithms written in Verilog are proprietary to Qbitrex.

The mathematics of a Quantum Beam Splitter are demonstrated below by Prof. S. Lakshmi Bala, Department of Physics, IIT Madras in the video below: